IP licensing
Every core here was designed, verified bit-exact against an independent model, and measured on real hardware — one of them through a SKY130 tape-out. You license the RTL, the reference model and the vectors that prove it, so you can check the claims instead of trusting them.
The multiplier for GF-T: 2.84× and 5.53× lower error than tekum16 at mid and far range, a tie near unity, no regime decode. Published as arXiv:2606.05017 with an independent reference model and bit-exact vectors; ratios re-measured independently on 8 August 2026.
Maps entirely into fabric, leaving the DSP columns free for the rest of your system: 32,252 LUTs with zero DSP48, or 21,223 LUTs if the 64 hard multipliers are allowed. Combinational, 0 latches.
Built for software-defined radio (AD9361), part of a full ternary network stack with mesh routing and authenticated encryption. Proven device-to-device over the air.
Neural primitives that perform their own backward pass on the FPGA: forward, gradient and weight update in RTL, no host in the loop. 100% held-out on real silicon.
Synthesisable and readable, not obfuscated.
The thing that lets you prove the core is right rather than believe it.
Bit-exact test vectors per pipeline stage, so a regression tells you which stage broke.
Frequency, resources and a latch-free check on real hardware.
A core that does not land in your system is worth nothing.
Source and vectors for a single project, so you can measure it in your own flow first.
Use in one product, with integration support and the verification harness.
Broader rights negotiated per case, including royalty-based terms.
A format or datapath designed for your constraints, with the same bit-exact verification.
Tell me the device and the budget you are working against. If none of these cores is right, I will say so — and quote for one built to fit.