Blog
[measured on FPGA: layer 0, 403,200 of 403,200 receipts verified, registered before the run; the phi step and digit recombination are host arithmetic; one synthetic activation vector] The TNF paper's GFTernary weights, t*phi, applied to activations in Z[phi], ran on the unchanged AX7203 node with no multiplier. Each output is W.b + (W.a + W.b)*phi, so the node computes only ternary dots and the host adds once per output. All 5,632 Z[phi] rows of layer 0 matched a plain Z[phi] multiplication oracle bit for bit.
The TNF paper's weight format is GFTernary: a weight is t*phi, with t in {-1, 0, +1}. Its activations live in Z[phi], the numbers a + b*phi with integer a and b. The paper claims that a layer's linear path is exact in Z[phi] and needs no multiplier. The AX7203 node from the previous post computes signed 32-trit ternary dot products and signs every answer. We asked whether that node, unchanged, can compute a GFTernary layer on Z[phi] activations exactly.
Because phi^2 = phi + 1, applying a weight is the Fibonacci step: t*phi*(a + b*phi) = t*(b + (a + b)*phi). Summed over a row, one output is W.b + (W.a + W.b)*phi. W.a and W.b are ternary-by-integer dot products. With a and b in [-127, 127], each one is six balanced-ternary digit planes, which makes 12 node jobs per 32-wide chunk. The phi itself costs one integer add per output, done on the host.
This is the same point as an earlier post, 'The golden ratio in this format is a scale factor, not information', now measured on silicon. In the weights, phi is a fixed linear map on Z[phi], not a product the hardware has to form. The node's work in this run is exactly the kind of work it did for tern_tc: ternary dots, nothing else.
The command, the input, the expected numbers and the rules were committed at 03:32:06 UTC, and the run started at 03:32:44. The input was layer 0 of the trained tern_tc model: all 7 ternary matrices, 2,816 outputs, one Z[phi] activation vector from a fixed seed, and 24 jobs in flight. The rules: the run happens once, and its result is recorded whatever it is. A UART slip would count against the link, not against the Z[phi] claim, and would still be recorded as a fail.
| Registered | Board | |
|---|---|---|
| Jobs | 403,200 | 403,200 of 403,200 sent |
| Receipts verified | 403,200 / 403,200 | 403,200 / 403,200 |
| Z[phi] rows bit-exact | 5,632 / 5,632 | 5,632 / 5,632 |
| Rejected | none | none |
| Time | about 86 s | 85.35 s, 4,724 answers/s |
Every answer passed the same five checks as in the tern_tc run: status, nonce, node id, a SipHash tag recomputed under the key, and y. The oracle is plain Z[phi] multiplication, (a, b)(c, d) = (ac + bd, ad + bc + bd), applied to each weight and activation pair and summed. It uses neither the Fibonacci shortcut nor the digit split. Each output is checked as two rows, the rational part and the phi part minus the rational part. Both are bit-exact exactly when the output assembled from the board's answers equals the oracle in Z[phi].
Before the board run, the self-test showed each check able to fail:
| Wrong on purpose | Result |
|---|---|
| an oracle that uses phi^2 = 1 | 12 / 24 rows: every phi row fails |
| weights read as t instead of t*phi | 0 / 24 rows |
| the host drops the 3^0 digit plane | 0 / 24 rows |
| a validly signed wrong answer | rejected as 'lie' |
| a cell signing with another key | 0 receipts |
The node's own Verilog, unchanged, also ran a request stream of the same kind in simulation, with synthetic weights for one matrix: 7,680 of 7,680 receipts and 128 of 128 rows.
Work with me
I audit RTL and build independent, bit-exact models, then take the result through synthesis and, when useful, onto an Artix-7 board. The first conformance module is free.