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A measurement number needs its passport
[Measured] An isolated GFTernary decoder is recorded at 66 LUT and 974.66 MHz on an Artix-7 XC7A200T, with its toolchain, seed statistic and same-part baseline. The receipt does not claim tokens per second or system throughput.
[Measured] A number is not a comparison until its measurement passport travels with it. Our isolated GFTernary decoder measured 66 LUT at 974.66 MHz on a Xilinx Artix-7 XC7A200T on the ALINX AX7203 board.
The result came from the open flow recorded in the source: Yosys 0.65, nextpnr-xilinx 1743d0f and Icarus Verilog 13.0; the reported figure is the median of five seeds, with DSP inference disabled. This is an isolated decoder, not a complete inference system.
The baseline belongs on the same line
The same source records a bare-wire baseline on the same part: 112 LUT at 827.81 MHz. The 66-LUT result is therefore a property of this decoder, this downstream register and this synthesis flow. It is not a claim that a ternary datapath has a universal area advantage.
| Passport field | Recorded value |
|---|---|
| Part and board | Xilinx Artix-7 XC7A200T; ALINX AX7203 |
| Flow | Yosys 0.65; nextpnr-xilinx 1743d0f; Icarus Verilog 13.0 |
| Statistic | Median of five seeds |
| DSP inference | Disabled |
| Baseline | Bare wire on the same part: 112 LUT at 827.81 MHz |
| Measured object | Isolated GFTernary decoder, not a system |
A second measurement limits the first
[Measured] An APoT sweep in the same project produced 130, 380, 230 and 384 LUT at shift widths 2 through 5. The sequence is non-monotone. That makes a small gap between two synthesis points unsafe as a general area claim; a single logic-synthesis count is not a substitute for a post-route or device-level comparison.
What the receipt proves
- It records one reproducible isolated-decoder result: 66 LUT at 974.66 MHz on the named FPGA part and open toolchain.
- It records a same-part baseline, so the reader can see what was compared rather than only the headline number.
- It records the non-monotone APoT sweep instead of smoothing away an inconvenient tool behaviour.
What it does not prove
- We have no own tokens-per-second measurement on AX7203 or another board in this post.
- An isolated decoder is not a complete model, memory system, prefill path or decode path.
- The result is not a cross-device characterisation and does not compare a takum implementation in the same flow.
- No claim about an ASIC, fabricated die, power or system throughput follows from these LUT and frequency figures.
For an engineer, the practical rule is simple: put the part, board, toolchain, seed statistic, disabled features, same-part baseline and measured object next to every hardware number. Without those fields, a tok/s headline cannot be reproduced or fairly compared.
What this does not settle
- The post records an isolated decoder, not tokens per second, end-to-end inference, power, memory bandwidth or a full model.
- The result is tied to one FPGA family and one open flow; cross-device and vendor-flow comparisons were not performed here.
- A same-flow takum implementation was not synthesised beside this decoder.
- The non-monotone APoT sweep is a warning about the measurement flow, not a model of all FPGA implementations.
Receipts
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