Capstone: a filter as the board computes it

Design a low-pass, feed it two tones as 16-bit samples and see what the RTL arithmetic outputs next to the same filter in f64, down to the last bit.

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Where the numbers come from

gHashTag/t27 specs/fpga/dsp/signals.t27 (t27#8985): every value on the page is its fn bodies, compiled to wasm (logic.js)
R. G. Lyons, Understanding Digital Signal Processing, 3rd ed., ch. 12: digital data formats and their effects
Xilinx UG479, 7 Series DSP48E1 Slice User Guide: the 48-bit accumulator the sum fits in