tri fpga-tools · 14 bench tools test themselves

14 of 14 bench tools pass their own self-tests in one sweep: decode 18/18, repin 17/17, firelog 10/10, tmpcheck 9/9, stamps 9/9, keep 9/9, jtag and seeds PASS.

  ok  even code is not an IDCODE                                                                        
  ok  unknown keeps manufacturer                                                                        
  ok  ioreg: vendor 0x03fd -> [0x0008] only                                                             
  ok  ioreg: absent vendor -> []                                                                        
  ok  xc3sprog: versions                                                                                
  ok  xc3sprog: chain                                                                                   
  ok  xc3sprog: empty chain flagged                                                                     
  ok  tdo: all ones -> stuck-high                                                                       
  ok  tdo: all zeros -> stuck-low                                                                       
  ok  tdo: real code -> answers                                                                         
  ok  tdo: no line -> none                                                                              
  ok  ofl: Digilent FT232H -> digilent_hs2                                                              
  ok  ofl: unknown FTDI -> None                                                                         
  ok  ofl: idcode without revision nibble                                                               
jtag self-test: PASS                                                                                    
--- seeds --self-test                                                                                   
  ok  post-route Fmax, not placement estimate                                                           
  ok  cells                                                                                             
  ok  logic/routing split                                                                               
  ok  unfinished log -> None                                                                            
  ok  several clocks -> slowest                                                                         
  ok  --clock picks one                                                                                 
  ok  --clock absent -> None                                                                            
  ok  summary median                                                                                    
  ok  summary identical cells                                                                           
  ok  summary flags differing netlists                                                                  
  ok  seed from file name                                                                               
seeds self-test: PASS                                                                                   
tools: 14/14 tool self-tests pass                                                                       
trinity-fpga $

recorded 2026-10-04 04:52 UTCreal 5.8 sshown 5.8 sexit codes 0

$ tri fpga-tools

Staged: the prompt and the typing. Real: every byte the commands printed, at the time they printed it. Any silence longer than 2 s is shown for 2 s, and the title bar says so while it happens. Edited: home directory shown as ~.

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