tri fpga-steps E3
The Ethernet bring-up plan on the bench: pre-registered steps, logged exits, what ran and what did not
tri fpga-steps E3
trin-1482 $ tri fpga-steps E3
plan NODE_ETHERNET_PLAN.md: E3 on the board: pre-registered 19:36Z, not run
x 1 logged, exit 2 tri fpga-run e3_preping -- ping -c 2 192.168.1.222
x 2 logged, exit 0 tri fpga-run e3_hostnet -- tri fpga-hostnet 192.168.1.222
· 3 check tri fpga-usb
· 4 check tri fpga-ioclients
5 open tri fpga-flash e3_flash artifacts/bitstreams/e3_eth_arp_icmp_zinv_t1.bit -
-owner-yes "QUOTE" --expect 4fd7923d
6 open tri fpga-run e3_uart_before -- python3 -u eth_arp_icmp_ax7203.py --port /d
ev/cu.usbserial-110 --lines 10
7 open tri fpga-run e3_ping -- ping -c 20 192.168.1.222
8 open tri fpga-run e3_arp -- arp -an
9 open tri fpga-run e3_uart_after -- python3 -u eth_arp_icmp_ax7203.py --port /de
v/cu.usbserial-110 --lines 10
· 10 check python3 conformance/eth_arp_icmp_ax7203.py --judge
11 open tri fpga-flash node0_restore_after_e3 artifacts/bitstreams/trinet_node0_ci
30762491794.bit --owner-yes "QUOTE" …
12 open tri fpga-run tern_tc_all_w24_after_e3 -- python3 -u tern_tc_layer_ax7203.p
y --all --setkey --port /dev/cu.usbs…
· 13 check tri fpga-keycheck
port plan /dev/cu.usbserial-110; present none — use the present one (tri fpga-usb names it)
first tri fpga-usb
first tri fpga-ioclients
next tri fpga-flash e3_flash artifacts/bitstreams/e3_eth_arp_icmp_zinv_t1.bit --owner-yes "QUOTE" --e
xpect 4fd7923d
note QUOTE is the owner's «да» in their words; an unattended iteration cannot run a flash
steps: 2 logged (1 with a nonzero exit: the judge or the doc says whether that is the expected result),
7 open, 0 problem(s); nothing was run
trin-1482 $ recorded 2026-10-07 23:27 UTC real 2.6 s shown 2.6 s exit codes 0
$ tri fpga-steps E3
Staged: the prompt and the typing. Real: every byte the commands printed, at the time they printed it. Any silence longer than 2 s is shown for 2 s, and the title bar says so while it happens. Edited: home directory shown as ~.
Trinity S³AI
