t27c on cts.t27 -- clock-tree synthesis, native
t27c 0.4.0 on a laptop (macOS): 15 tests of the clock-tree spec pass natively, 2 invariants comptime; the header holds the Artix-7 teaching delays (BUFG 0.1 ns, BUFH 0.05 ns, PLL jitter 50 ps).
t27c on cts.t27 -- clock-tree synthesis, native
runtime asserts executed, per test (#6509; a pass with 0 is vacuous, T730):
3 pll_config_creation
3 bufg_creation
3 bufh_creation
4 clock_tree_creation
1 tree_delay
1 skew_ok_yes
1 skew_ok_no
2 cts_report_ok
1 est_buffers_one
1 est_buffers_many
1 est_tree_levels_one
1 est_tree_levels_two
1 est_tree_levels_three
1 validate_pll_ok
1 validate_pll_empty
vacuous passes 0 of 15 (passed with 0 runtime asserts executed)
files $ sed -n '1,10p' specs/fpga/cts.t27
// SPDX-License-Identifier: Apache-2.0
// t27/specs/fpga/cts.t27
// T27 Clock Tree Synthesis Specification
// PLL configuration, clock buffer trees, skew estimation
// Artix-7: BUFH=0.05ns, BUFG=0.1ns, PLL jitter=50ps, max skew=100ps
// Uses flat arrays + count fields (parser-compatible)
// phi^2 + 1/phi^2 = 3 | TRINITY
module CTS {
files $
recorded 2026-10-07 17:34 UTC real 11.8 s shown 11.8 s exit codes 0 0 0
$ t27c --version
$ t27c test-report specs/fpga/cts.t27 --specs-dir specs
$ sed -n '1,10p' specs/fpga/cts.t27
Staged: the prompt and the typing. Real: every byte the commands printed, at the time they printed it. Any silence longer than 2 s is shown for 2 s, and the title bar says so while it happens. Edited: home directory shown as ~.