t27c on clock_domain.t27 -- the CDC spec, native

t27c 0.4.0 on a laptop (macOS): 12 tests of the clock-domain spec pass natively, 5 invariants proved comptime, and the spec's own header says what it models.

  rate    100.0%                                                                                        

  runtime asserts executed, per test (#6509; a pass with 0 is vacuous, T730):                           
       2  ext_clock_is_external                                                                         
       2  pll_clock_is_pll                                                                              
       1  period_12mhz                                                                                  
       1  period_100mhz                                                                                 
       1  half_period                                                                                   
       1  same_domain_true                                                                              
       1  same_domain_false                                                                             
       1  needs_crossing_diff_freq                                                                      
       1  needs_crossing_same                                                                           
       1  crossing_data_bits                                                                            
       1  async_cross_fifo                                                                              
       1  sync_cross_not_async                                                                          
  vacuous passes  0 of 12  (passed with 0 runtime asserts executed)                                     
files $ sed -n '1,12p' specs/fpga/clock_domain.t27                                                      
// SPDX-License-Identifier: Apache-2.0                                                                  
// t27/specs/fpga/clock_domain.t27                                                                      
// Clock Domain Abstraction for Trinity T27 FPGA HIR                                                    
// Defines clock sources, PLL configs, and cross-domain crossing                                        
// Uses flat structs (parser-compatible)                                                                
// phi^2 + 1/phi^2 = 3 | TRINITY                                                                        

module ClockDomain {                                                                                    

    // === Clock source kind ===                                                                        

    pub const ClkSrcKind = enum(i8) {                                                                   
files $

recorded 2026-10-07 17:29 UTCreal 12.9 sshown 12.6 sexit codes 0 0 0

$ t27c --version $ t27c test-report specs/fpga/clock_domain.t27 --specs-dir specs $ sed -n '1,12p' specs/fpga/clock_domain.t27

Staged: the prompt and the typing. Real: every byte the commands printed, at the time they printed it. Any silence longer than 2 s is shown for 2 s, and the title bar says so while it happens. Edited: home directory shown as ~.

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